In this case you need to look into the devices current consumption.  If it’s too high then the next step is to look into whether the microcontroller could only power it for very short bursts say every few 100mS to keep the average current consumption down.  This doen’t always work as some devices take time to power up and be ready or the current requried may still be too high even with this approach.

T=RC, so:

          Time

  Resistance   Capacitance

or

      mS	  

  Kohms   uF

or

    Seconds

  ohms      F

The result gives you 1T. This is 1 time period. So for 1000uF and a 1K resistor T = 1000mS

For charging and discharging a capacitor:

1T 63%
2T 86.5%
3T 95% (this tends to be the default usage with 95% considered basically there)
4T 98% (this tends to be considered as 100% charged / discharged)
(in theory 100% is infinite)

Voltage is irrelevant to this. If a 12V supply was connected via 1K to a 1000uF cap it would take 1000mS to reach 7.56V, 3000mS to reach 11.4V. Its exactly the same for discharging a capacitor.

http://www.analog.com/library/analogdialogue/archives/41-06/ground_bounce.html

Buck DCDC Converters

This is bad:

This is good:

Boost DCDC Converters

Design Tips

Switcher IC’s with internat mosfets tend to aim towards higher efficiency and therefore lower mosfet on resistance.  However low on resistance means faster switching times, which contributes to noise and ground bounce.  Should you consider a less efficient IC with a higher on resistance?  You can’t easily add resistance externally as the resistance your aiming for is still very low (e.g. 100 or more milli Ohms).

For a boost design get the output capacitor cathode right next to the switchers mosfet ground pin.  A few extra mm of tracking can cause issues on some designs.  Keep the inductor to diode and diode to capacitor tracking very short.

Can you shut-down the DCDC converter while doing sensitive measurements?  If your doing periodic fast AtoD readings then whilst not an ideal solution, including the means to shut-down the DCDC converter whilst the AtoD is sampling can be a compromise solution in suitable applications.

Solving The Problem

The primary cause of ground bounce is poor PCB design, or more typically non optimal PCB design.  These notes refer to boost switcher, but apply for a buck switcher also by adjusting for the different wiring arrangement.

A classic method to solving it is to start adding or changing capacitors, but this usually only has a very limited effect.

A good starting point to identifying the problem and curing it is to start by removing as many imperfections as possible:

Power the PCB with 0Vin connected directly to the switchers GND point, and with +Vin connected near to the inductor.

If the main capacitor is not connected ideally as above lift it and make it perfect using short wire links if necessary.

These two steps will give you a good starting point.  Has the ground bounce reduced or gone away?

Scope from the switchers GND point (mosfet ground) to the +V terminal of the main capacitor.  Is there noise?  There may be only a very short link but if you have noise between these two points then maybe you have the cause of your problem?  It might seem impossible for there to be noise from an inch of copper or wire, but it isn’t and if it’s there you need to eradicate it.

Check there isn’t an area elsewhere in the circuit causing or contributing to the noise by powering the PCB after the switcher (i.e. at its output so it’s no longer used).  Is the supply to the rest of the circuit now perfectly clean?

With the switcher powered again use a scope with its GND connected to the switchers GND point (DCDC converter IC power ground or external mosfet ground) and probe different areas of the PCB.  Does the noise level change depending on where you probe?  Probe to other GND points also.  If so this is likely to indicate areas of the circuit contributing to the noise.  What is the GND connection to that area like?  Does the noise reduce if you provide it with a direct dedicated GND connection to the switchers GND point?

Multilayer PCB 0V ground planes are great at reducing signal noise around a circuit, but are not necessarily great at reducing switcher ground bounce issues (as with audio they can often be a cause of new problems).  Should your power circuitry use a separate GND to the GND power plane or should the ground plane include some cuts to direct the switcher current? Don’t assume because there is a great big ground plane connecting to an area of the PCB that it’s therefore got a perfect GND connection.  Remember that true ground will be at one point of the PCB (i.e. at the 0V power connection in or at the GND connection of the switcher).  All other points returning current are not grounds but just return lines to ground.

Are there big capacitors elsewhere on the PCB that are affecting the switchers main capacitor being able to provide the perfect switch mode supply arrangement?  Are they part of the current path during switching?  Ensure the main capacitor is a low ESR (low impedance) type.

Does changing the switchers diode to a different part help.  It probably shouldn’t but it’s worth checking in case.

Have a beer, then come back and read the switcher IC datasheet for a 10th time.  Hidden in the horrible technical detail may be something you’ve overlooked or that sparks a new process of elimination.  Get a piece of paper and draw out how you think the current is flowing in PCB traces.  Does that match the actual tracking and physical layout of the PCB?

Remember, the theory is sound but any PCB layout isn’t perfect.  The problem is being caused by something that isn’t perfect enough – you just need to work through every detail and find it.  If your new to switch mode design don’t worry, even experienced experts still get bitten by this stuff once in a while and the best way to learn the pitfalls is to find your way out of them – you only have to learn a mistake once.

More extreme solutions:

Should you completely isolate a sensitive area or the non high power area of the circuit?  Can you use a separate mains transformer winding or an isolated DCDC converter to power the other section of the circuit?  If you can this is often be a great solution.  You can then choose the one perfect point to connect the isolated GND rails.  Alternatively for more extreme issues should they remain isolated with opto isolated signals between them?

Some Resources

You can never get your hands on enough ideas about solving ground bounce when faced with it!

http://www.analog.com/library/analogdialogue/archives/41-06/ground_bounce.html

http://homepages.which.net/~paul.hills/Emc/BecBody.html

http://www.edn.com/article/466994-Reducing_ground_bounce_in_dc_dc_converter_applications.php

http://www.thinksrs.com/support/Therm%20Calc/NTCCalibrator/NTCcalculator.htm

http://www.thermistor.com/calculators.php

http://www.absorblearning.com/media/attachment.action?quick=pq&att=1843

A USB device is permitted to draw up to 100mA (1 unit load) for USB2.0, and up to 150mA for USB3.0. It may do this prior to any USB communication, so this is the current limit a USB device may draw if using a USB connector to provide the charger input without a USB interface to request a higher current from the USB hub (which it may or may not be granted depending on the hub).

USB devices that need more power than this are called high power devices (instead of low power).  The maximum load that may be requested for USB2.0 is 500mA and for USB3.0 is 900mA.

The “USB Battery Charging Specification” adds optional new power modes. A host or hub port that supports charging can supply up to 1.5 A when communicating at low speed or full speed, or a maximum of 900 mA when communicating at high speed, and as much current as the connector will safely handle when no communication is taking place.  USB 2.0 standard A connectors are typically rated at 1500mA. The Dedicated Charging Port shorts the D+ and D- pins with a resistance of up to 200Ω. This short disables data transfer but allows devices to detect the Dedicated Charging Port and allows simple high current chargers to be made.

Basic MOSFET Selection Rules / Checks

The Drain to Source max voltage rating (max Vds) determines the maximum voltage you can switch.

The Gate threshold voltage determines the voltage difference you need to apply to the gate to make the mosfet conduct.

The Gate to Source max voltage (max Vgs) is a critical factor that must not be exceeded (even for a few nS) or the MOSFET can be destroyed. Will the power rails spike? If so provide protection of some sort (e.g. transient suppressor) or select a device with a higher rating. When switching high voltage rails (e.g. 24V from low voltage logic you can often meet this requirement using a potential divider to provide the mosfet with a gate voltage above 0V.

Do you need to use a mosfet driver IC?  If the mosfet has a high Gate switching current (e.g. high current MOSFETs) or will be switched fast (to ensure that the mosfet operates efficiently with minimal power dissipation) then this may be necessary.

Check the ‘Why MOSFETs Fail’ notes below

General Notes

Because of their high input impedance MOSFET’s are vulnerable to damage by electrostatic discharges.  Sometimes they have integral protection diodes or zeners.

Enhancement mode mosfets incorporate a diode between the source and drain pins.
A double enhanced mosfet incorporates two diodes cathode to cathode.

A MOSFET only requires gate current during the switching edge, to charge the GS capacitance. This gate current can be high.

To Switch 0V

Use a N-Channel MOSFET with Source connected to 0V (either directly or via a current limiting resistor) and the load connected to Drain.

Whenever the Gate voltage exceeds the Source voltage by at least the Gate Threshold Voltage the MOSFET conducts. The higher the voltage, the more the Mosfet can conduct.

N channel mosfets have lower on resistances than P channel mosfets so are preferable if you have the choice of which side to switch.

N-Channel MOSFETs can also switch +V in certain configurations, with Drain being Vin and Source being switched Vout.

To Switch +V

Use a P-Channel MOSFET with Source connected to +V (either directly or via a current limiting resistor) and the load connected to Drain.

Usually the Source pin must be more positive than the Drain (however this isn’t true when using a P Mosfet to provide reverse polarity protection or instance).

Whenever the Gate voltage is lower than the (Source Voltage – Gate Threshold voltage) the MOSFT conducts.  If the gate voltage is higher than this it does not conduct. The greater the voltage difference from the Source the more the MOSFET can conduct.

P channel mosfets have higher on resistances than N channel mosfets so are often less preferable.

Gate Resistor

Using a low value resistor between the MOSFET driver and the MOSFET gate terminal dampens down any ringing oscillations caused by the lead inductance and gate capacitance which can otherwise exceed the maximum voltage allowed on the gate terminal. It also slows down the rate at which the MOSFET turns on and off. This can be useful if the intrinsic diodes in the MOSFET do not turn on fast enough.

If you are driving a MOSFET from a bouncy, possibly noisy, line (for instance relay contacts), you should use a small series gate resistor close to the MOSFET, to suppress VHF oscillation. 22 ohms is plenty, you can use less.

For high current MOSFETs the Gate Channel Capacitance can be very high and a rapidly changing drain voltage can produce milliamps of transient Gate current.  This could be enough to overdrive and even damage delicate CMOS driver chips. Having a series resistor is a compromise between speed and protection, with values of 100R to 10K being typical. Even without inductive loads there is dynamic gate current. Also, MOSFETs are extremely susceptible to damage caused by electrostatic discharge and can be damaged irreversibly by a single instance of Gate breakdown. For this reason it is a very good idea to use gate series resistors of 1K to 10K.  This is especially important if the Gate signal comes from another circuit board.

If a MOSFET could be left floating then use a pull down resistor (100K to 1M is generally in) from Gate to Source.

Gate Driver IC’s

Driver IC’s are often used for high current MOSFETs and when using fast switching rates due to the MOSFET needing brief but high currents to change state. A drivers inputs are typically logic level. Often MOSFETs require a 1 – 2A drive to achieve switching efficiently at frequencies of hundreds of kilohertz. This drive is required on a pulsed basis to quickly charge and discharge the MOSFET gate capacitances.

Paralleling MOSFETs

MOSFETs may be placed in parallel to improve the current handling capability. Simply join the Gate, Source and Drain terminals together. Any number of MOSFETs can be paralleled up, but note that the gate capacitance adds up as you parallel more MOSFETs, and eventually the MOSFET driver will not be able to drive them.

Why MOSFETs Fail

Insufficient gate drive

MOSFET devices are only capable of switching large amounts of power because they are designed to dissipate minimal power when they are turned on. You must ensure that the MOSFET is turned hard on to minimise dissipation during conduction. If the device is not fully turned on then the device will have a high resistance during conduction and will dissipate considerable power as heat.

Over Voltage

Exceed a MOSFETs voltage rating for just a few nS and you can destroy it. Select MOSFET devices conservatively for the anticipated voltage levels and ensure you allow for or deal with suppressing any voltage spikes or ringing.

Peek current overload

Overload currents for a short duration can cause progressive damage to a MOSFET often with little noticeable temperature rise prior to failure.  MOSFETS often quote high peek current rating but these are typically only for peek currents of a few 100 uS.  If switching inductive load ensure you overrate the MOSFET to handle peek currents.

Prolonged current overload

If a MOSFET is passing a high current then its on state resistance will cause it to heat up.  If the heatsinking is poor then the MOSFET can be destroyed by excessive temperature. A solution to this can be to parallel multiple MOSFETs to share high load currents between them.

H or Full Bridge Configuration Shoot-through / Cross conduction

When using P and N MOSFETS between voltage rails to provide a H or L output voltage, if the control signals to the MOSFETs overlap then they will effectively short circuit the supply and this is known as a shoot-through condition. When it occurs any supply decoupling capacitors are discharged rapidly through both devices every time a switching transition occurs and resulting in very short but large current pulses.

To avoid this you must allowing a dead time between switching transitions, during which neither MOSFET is turned on.

No free-wheel current path

When switching inductive loads there must be a path for back EMF to free-wheel when the MOSFET switches off. Enhancement mode MOSFETs incorporate a diode that provides this protection.

Slow reverse recovery of MOSFET body diode

High Q resonant circuits are capable of storing considerable energy in their inductance and self capacitance. Under certain tuning conditions, this causes the current to “free-wheel” through the internal body diodes of the MOSFET devices as one MOSFET turns off and the other device turns on. A problem arises due to the slow turn-off (or reverse recovery) of the internal body diode when the opposing MOSFET tries to turn on. MOSFET body diodes generally have a long reverse recovery time compared to the performance of the MOSFET itself. If the body diode of one MOSFET is conducting when the opposing device is switched on, then a “short circuit” occurs similar to the shoot-through condition described above. You can solve his problem by adding a Schottky diode connected in series with the MOSFET source (prevents the MOSFET body diode from ever being forward biased by the free-wheeling current) and a high speed (fast recovery) diode connected in parallel to the MOSFET/Schottky pair so that the free-wheeling current bypasses the MOSFET and Schottky completely. This ensures that the MOSFET body diode is never driven into conduction. The free-wheel current is handled by the fast recovery diodes which present less of a shoot through problem.

Excessive gate drive

If the MOSFET gate is driven with too high a voltage the gate oxide insulation can be punctured effectively destroying the MOSFET. Ensure that the gate drive signal is free from any narrow voltage spikes that could exceed the maximum allowable gate voltage.

Slow switching transitions

Little energy is dissipated during the steady on and off states, but considerable energy is dissipated during the times of a transition. Therefore it is desirable to switch between states as quickly as possible to minimise power dissipation during switching. Since the MOSFET gate appears capacitive, it requires considerable current pulses in order to charge and discharge the gate in a few tens of nano-seconds. Peak gate currents can be as high as an amp.

Spurious oscillation

MOSFET inputs are relatively high impedance, which can lead to stability problems. Under certain conditions high voltage MOSFET devices can oscillate at very high frequencies due to stray inductance and capacitance in the surrounding circuit. (Frequencies usually in the low MHz.) A low impedance gate-drive circuit should also be used to prevent stray signals from coupling to the gate of the device.

Conducted interference with controller

Rapid switching of large currents can cause voltage dips and transient spikes on the power supply rails which may interference with the control circuitry. Good decoupling and star-point grounding techniques should be used.

Static electricity damage,

MOSFETs are very sensitive to static.  Antistatic handling precautions should be used to prevent gate oxide damage.

It’s usually very important that the voltage supply to an RFID reader is protected from ripple and interference.

Where you have noisy electronics in the proximity:

A simple RC filter of 10R and 1000uF will go a long way to preventing interference. Better still is using a separate power supply from a dedicated voltage regulator if you have the option.

Use a star point for the earthing. Typically this will ideally be the negative pin of a 100 – 1000uF smoothing capacitor, with all the grounds taken back to this single point.

Use thick tracks to high power devices and areas. Airborne interference can result when high value DV/DT is around. This can come from current switching too. The tracks carrying power must be wide.  Typically a 0.1” track is about 10nH per cm, so if you switch an amp with a rise time of 0.01uS then you get Ldi/dt = 10/1000000000.   * 1/0.01/1000000 = 1V.  This 1volt appears on the power supply rail and has several effects. It directly makes a 1volt spike and it makes a large blob of the PCB waggle by 1volt which connects to sensitive bits elsewhere by stray capacitance.

If you are able to have +V and 0V power tracks to high power devices run above and below each other on top and bottom layers this will help cancel out the field they generate.

When using long PCB tracks for a connection to an antenna ideally use a decent thickness and route along the edge of the PCB if possible and away from noisy devices / circuitry.  Placing ground plane around and below tracking can be useful to protect the signals. If running tracks to different antenna keep them separated from each other.

Remember, the enemy of any RFID electronics design is noise!  Is there anything else you can think of to reduce it?

Solving Interference Problems

If you have +V and 0V cables running in proximity to the RFID reader twisting them together will help cancel out the field they generate.  Also make them as short as possible and if possible angle them away from your reader.

Experiment by turning off the RFID reader and looking at the coil voltage with a sensitive oscilloscope. Rotate the coil for minimum interference. If possible move the coil to a minimum interference position. Even if it is impossible to eventually change the angle or possition of the coil, this experiment may identify ‘Hot Spots’ that will help you zero in on the cause of a problem.

Many RFID readers have interference rejection but the interference may be so great that it is saturating the output of the reader detector. It may be that a low Q coil will give a lower output and the reader will not saturate so it may actually read better. A 1k resistor across the coil is extreme but may still be a good starting point. You can plot the range against several values of resistance from 1k to 10k.

The effects of metalwork are often not predictable. If the RFID reader coil is surrounded by metal in such a way that the steel effectively becomes a shorted turn, then this will appear as negative inductance and you could try to compensate by adding 50pF in parallel with the coil. If it helps try other values. A simple way to see if the metal is having an effect is to isolate the reader and measure its supply both in situ and out of situ. If there is a large difference then you may have a problem.

Switching Antennas

You can switch multiple antennas to an RFID reader using a mosfet relay (e.g. Omron G3VM-353G).  The critical specifications are on state resistance (which you want to be as low as possible so it doesn’t kill your antenna current), max AC voltage (so it can handle the high voltage that will be generated in the coil and max current (to handle the current that is passed through the coil).  If your using an off the shelf RFID module then this can be an attractive option.  However if your designing the reader yourself at the chip level then its often not worth it as mosfet relays with the needed spec’s will often cost significantly more than just using a seperate RFID reader IC for each antenna, with added the advantage that you don’t get the variable resistance problems introduced from the mosfet.

The one thing that is really annoying about it though is that as a phone it doesn’t have a normal phone line connection. Instead you have to connect it to an existing phones handset connection. The Jabra then mimics the handset. The thing that’s really annoying about this is that when you want to make or receive a call you have to press a button on the Jabra and also lift the phones handset so that the phone accepts the call. You can get round this by buying an expensive mechanical phone lifting device, which is a pretty ridiculous need in this day and age, or by using a specific model of office phone which has the right interface. Alternatively it is possible to connect the headset to another DECT base station, but once you do this the headset is no longer works as a PC USB audio headset, so basically a pointless feature.

A simple way round this if you’ve got geek tendencies is to instead interface it into a cheap phone using the following circuit:

We created this circuit by metering out the Jabra RJ45 AUX connector, so use it at your own risk! No liability accepted if you manage to blow up your Jabra!

Pins 7&8 of the AUX connector provide a constant 7.5 V power output. Pins 3&4 change from open circuit to short-circuit (80ohms) when the Jabra is in ‘on the phone’ mode. This is likely to be an internal relay contact as you can hear a relay clicking inside the unit, but we didn’t open the unit up to confirm this. The relay, diodes, transistor and resistors in the circuit shown can be soldered together and fitted inside or next to your normal phone, with an RJ45 cable (e.g. cat 5E ethernet cable) connecting into the Jabra Aux port.

With this hack to jabber headset is now perfect. Pressing the telephone button connects the headset to the phone and triggers the phone as if the handset had been lifted. Pressing the telephone button again closes the call. Press the computer button on the headset connects to your PC for use with Skype, Naturally Speaking, etc, etc.